![[ICO]](/theme/icons/blank.png){kind=icon} | Name | Last modified | Size |
|---|---|---|---|
![[PARENTDIR]](/theme/icons/folder-home.png){kind=icon} | Parent Directory | - | |
![[DIR]](/theme/icons/folder.png){kind=icon} | Modelsim/ | 2016-11-10 09:53 | - |
| kity/ | 2016-11-10 09:53 | - |
![[ ]](/theme/icons/pdf.png){kind=icon} | cpld_cv4.pdf | 2016-11-10 09:53 | 1.3M |
| fpga_cv9.pdf | 2016-11-10 09:53 | 730K |
| doc.pdf | 2016-11-10 09:53 | 657K |
| fpga_cv6.pdf | 2016-11-10 09:53 | 545K |
| cpld_cv3.pdf | 2016-11-10 09:53 | 533K |
| fpga_cv8.pdf | 2016-11-10 09:53 | 489K |
| cpld_cv6.pdf | 2016-11-10 09:53 | 484K |
| fpga_cv7.pdf | 2016-11-10 09:53 | 467K |
| fpga_cv2.pdf | 2016-11-10 09:53 | 394K |
| cpld_cv5.pdf | 2016-11-10 09:53 | 393K |
| cpld_cv2.pdf | 2016-11-10 09:53 | 346K |
| cpld_cv8.pdf | 2016-11-10 09:53 | 328K |
![[ ]](/theme/icons/rar.png){kind=icon} | FPGA-kodovy zamok.rar | 2016-11-10 09:53 | 272K |
| fpga_cv4.pdf | 2016-11-10 09:53 | 261K |
| fpga_cv3.pdf | 2016-11-10 09:53 | 251K |
| fpga_cv1.pdf | 2016-11-10 09:53 | 172K |
| cpld_cv7.pdf | 2016-11-10 09:53 | 170K |
| fpga_cv5.pdf | 2016-11-10 09:53 | 158K |
![[ ]](/theme/icons/zip.png){kind=icon} | sup_cv9.zip | 2016-11-10 09:53 | 152K |
| sup_cv2.zip | 2016-11-10 09:53 | 126K |
| sup_cv6.zip | 2016-11-10 09:53 | 104K |
| sup_cv5.zip | 2016-11-10 09:53 | 90K |
| sup_cv4.zip | 2016-11-10 09:53 | 90K |
| sup_cv3.zip | 2016-11-10 09:53 | 70K |
| sup_cv8.zip | 2016-11-10 09:53 | 15K |
![[TXT]](/theme/icons/text.png){kind=icon} | zadania_fpga_2011-2012.txt | 2016-11-10 09:53 | 8.9K |
| sup_cv7.zip | 2016-11-10 09:53 | 5.7K |
![[ ]](/theme/icons/default.png){kind=icon} | delicka.vhd | 2016-11-10 09:53 | 3.1K |
Data server of The Department of Electronics and Multimedia Telecommunications, The Faculty of Electrical Engineering and Informatics of the Technical University of Kosice.